Two billion-transistor beasts: POWER7 and Niagara 3

[Daniel ~]

A 300mm Power 7 processor wafer

In years past, an ISSCC presentation on a new processor would consist of detailed discussion of the chip's microarchitecture (pipeline, instruction fetch and decode, execution units, etc.), along with at least one shot of a floorplan that marked out the location of major functional blocks (the decoder, the floating-point unit, the load-store unit, etc.).... [Front page...]

[cloasters]

Shazam, these are BMF CPU's! Is it a forgone conclusion that Apple will get the Power 7 processors from IBM? Wait a minute, I guess these are Server class procs.